| Summary: | Riscv64 - Rust compiler fails on SIMD Vector Tests | ||||||
|---|---|---|---|---|---|---|---|
| Product: | [QA/Testing] Functional (self) Testing | Reporter: | Sundeep Kokkonda <sundeep.kokkonda> | ||||
| Component: | oe-selftest | Assignee: | Deepesh Varatharajan <deepesh.varatharajan> | ||||
| Status: | RESOLVED FIXED | QA Contact: | |||||
| Severity: | normal | ||||||
| Priority: | Medium+ | CC: | randy.macleod, richard.purdie, tgamblin | ||||
| Version: | unspecified | ||||||
| Target Milestone: | 6.0 M3 | ||||||
| Hardware: | RISCV | ||||||
| OS: | Multiple | ||||||
| Whiteboard: | |||||||
| OS type for building Yocto: | --- | Type of Regression: | --- | ||||
| Verified: | Documentation change: | No (bug/feature does not impact docs) | |||||
| Attachments: |
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Sundeep, if this applies to master (Rust-1.92+), please move to 6.0-M2+. This testcase failures were fixed upstream with the following commits : https://github.com/rust-lang/rust/commit/6c7dc05f7d1f000cdb7de2390c8532545129e32d https://github.com/rust-lang/rust/commit/2e49c52855c6a726d4f42705fe42d3c237f14b32 These commits are included in rust-1.94 which is now available in the oe-core master. Thanks Deepesh. For anyone who might be interested, this was fix upstream in Rust in 1.90/1.91: ❯ cd .../rust.git ❯ git tag --contains 2e49c52855c6a726d4f42705fe42d3c237f14b32 1.90.0 1.91.0 1.91.1 1.92.0 1.94.0 1.94.1 ❯ git tag --contains 6c7dc05f7d1f000cdb7de2390c8532545129e32d 1.91.0 1.91.1 1.92.0 1.94.0 1.94.1 |
Created attachment 5129 [details] Rust oe-selftest failure log for riscv64 Rust compiler (v1.88) fails on SIMD vector tests on RISCV64 target due to missing target features and FFI-Safe type issues. Below failure log seen for two `codegen` tests during `oe-selftest` for `riscv64-poky-linux-gnu`: 1. **Test: tests/codegen/const-vector.rs#OPT0** - Compilation fails (exit status 1) due to missing RISC-V target features (`zvl32b`, `zvl64b`, `zvl128b`) for SIMD types (`i8x2`, `f32x2`, `Simd<i32, 4>`, `Simd<i32, 3>`). - Ten warnings for non-FFI-safe types in `extern` blocks due to unspecified struct layouts. - Suggested fixes: Enable target features (`-C target-feature=+zvl32b,+zvl64b,+zvl128b`) and add `#[repr(C)]` or `#[repr(transparent)]` to struct definitions (e.g., `pub struct i8x2([i8; 2])`). 2. **Test: tests/codegen/simd/extract-insert-dyn.rs** - `FileCheck` fails due to mismatched LLVM IR for `extractelement` and `insertelement` instructions, with pointer-based loads/stores generated instead. - Indicates a potential RISC-V backend codegen issue for SIMD operations. See the attachment for complete failure log.